Displayport Auxiliary Channel Receiver

Hi all,

I'm trying to decode a DisplayPort Auxiliary Channel signal with my EP4CGX22. I'm using the input termination as required by the standard:

https://www.alteraforum.com/forum/attachment.php?attachmentid=6780

C_aux is 100n and Vbias_RX is 3.3V.

The measured voltage at the DP connector looks like this:

https://www.alteraforum.com/forum/attachment.php?attachmentid=6781

and at the FPGA pin:

https://www.alteraforum.com/forum/attachment.php?attachmentid=6782

The FPGA pin is configured as an input only and has the I/O-Standard 3.3V LVCMOS. Obviously this doesn't work. Does anyone know what could be wrong or has already any experience connecting DisplayPort to an FPGA? There are expansion boards for FPGA eval boards where they have the exact same schematic and I guess it works there. Do I need to specify another I/O-Standard? And if yes, which one?

Thanks,

Oliver