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Honored Contributor
Honored ContributorDifferent outputs with different delays
Hi every, I am using this code for providing 20 clock cycle delay in the output. the process is when the valid data become 1, the counters start counting and after 20 clock cycle the output w...
Altera_ForumHonored Contributor
Honored ContributorYou have misplaced 'end if ' lines and the c <= c + 1 statement never executes.
