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Altera_Forum's avatar
Altera_Forum
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9 years ago

Detect high impedance on the input pin

Hi to all, for my little project, I need to manage the output pin of any FPGA placing them at high impedance. This is not a problem, I can do it with MAX10 and Cyclone IV. However I would ...
Altera_Forum's avatar
Altera_Forum
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9 years ago

Another idea is to use an "oscillating" bus hold. Use the inverted latched input value as driver for a resistor to the input as programmable pullup/pulldown. In case the external Pin is tristate you have implemented a toggle flipflop with f/2 this way.

In case the external Pin is push/pull you get "1" or "0". The disadvantage is that you need two Pins for this ...