Design won't fit in device

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Yes, it did. I've disabled most of the logic that I added and kept it to it's minimum. I've tried many combinations of options and the best ones (as usual the original ones) puts the design 18 labs too big.

Does Quartus do multiple attempts if it fails to fit? Is there a way of finding out quickly that it's likely to fail?

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The fitter tries a maximum of 3 placement and routing attempts, with each successive attempt increasing the placement effort and hence increasing compilation times. You can

limit it to one attempt.

Settings -> Fitter Settings -> Limit to one fitting attempt

When the design fits, what was the device utilization, the peak and the average routing usage ?

What kind of design is it ? Digital signal processing ????