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Altera_Forum
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18 years ago

Design begining phase..

Hi Friends... Here in this forum we had been talking a lot about timing, multicycle path etc etc..bla bla bla..... My doubt is, before we begin any design say 50 MHz, or 60 MHz or an...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Hi ..

Can you please tell me a little more about levels of logic.

Suppose i am going to make a IP core, how can i know the levels of logic in my design.

I think by levels of logic Rysc meant Data path between two registers. If that is true, how will a designer know the data path between registers when the design has not yet started.

Regards

freak