Forum Discussion
Altera_Forum
Honored Contributor
13 years agoDedicated clock routed globally to PLL
Hello all, I'm currently developing a project with a display driving IP-core supplied by a manufacturer. The IP-Core utilizes two PLL's for DDR2 memory, while I also use one PLL for LVDS deseri...
Altera_Forum
Honored Contributor
13 years agoFixed it by deleting the db and temp folders in the project. Fixed several other errors too.
Shame on you Altera for not having a clean function.