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Honored Contributor
Honored ContributorDedicated Clock Output pin
1- In Altera FPGAs currently I am using Cyclone 4 is there a dedicated clock output pin? 2- Are we encouraged to use dedicated clock output pin or can we use some random I/O register(in the pad) ...
Altera_ForumHonored Contributor
Honored ContributorDear FvM
Assume that I do not use PLL in the design Question: If I plan to use the dedicated pair of clock pins; do I have to put the clock signal into a PLL before sending out? Or just assigning the signal to the pin and not instantiating PLL is good enough for me.
