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Honored Contributor
Honored ContributorDedicated Clock Output pin
1- In Altera FPGAs currently I am using Cyclone 4 is there a dedicated clock output pin? 2- Are we encouraged to use dedicated clock output pin or can we use some random I/O register(in the pad) ...
Altera_ForumHonored Contributor
Honored ContributorThere's a dedicated pair of clock ouput pins assigned to each Cyclone PLL. You are encouraged to use it preferably as clock output by the FPGA timing specification, which assures less jitter and uncertainty for the dedicated pins. You can however use any I/O pin if suitable for your design.
