DDR3 discret component skew question

Micron have an application note TN-41-13 (DDR point to point design) which is useful here. Under the Trace Length Matching heading, the note suggests that wasting up to 1% (+/-0.5% arbitrarily) of the total timing budget on length matching is appropriate. With 533 Mhz clock, that is 9.4 ps (1876ps/200). Typical FR4 flight time is 6.5 ps/mm. So this suggests you need to length match to better than +/-1.4 mm. Is this the answer to your question? All signal lines should be the same length.