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Altera_Forum
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15 years ago

DDR2 Read Issue in Cyclone III

I've instantiated a DDR2 SDRAM HPC using a Cyclone III. We've simulated the design and it works as expected. Using the hardware and SignalTap, I can do a write, and see the data on the mem_dq lines...
Altera_Forum's avatar
Altera_Forum
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13 years ago

I can think of two possibilities for those 'X':[list][*]you have a second driver in your testbench that forces a different value for local_rdata[*]you are reading an address that hasn't been initialized[/list]Do you have any error message or warning in the Modelsim console?