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Altera_Forum's avatar
Altera_Forum
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13 years ago

DDIO clock timing

Hi, I'm using a Stratix III EP3SL340 C3 (Terasic DE3) and I had a question about DDIO. I have 12 bit data from an ADC (AFE5807) coming in at 80MSPS. I wanted to use DDIO to receive the da...
Altera_Forum's avatar
Altera_Forum
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13 years ago

Thank-you rbugalho. I found another great resource as well.

For those stumbling accross this post later on.

http://www.ti.com/lit/an/slaa545/slaa545.pdf is a document by TI for interfacing a 250MSPS ADC and DAC with a Stratix IV using ALT DDIO blocks via the LVDS physical interface.

Explains the timing relations, clocks, phase relations, constraints etc really well.

Cheers

Zubair