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Altera_Forum
Honored Contributor
13 years agoDDIO clock timing
Hi, I'm using a Stratix III EP3SL340 C3 (Terasic DE3) and I had a question about DDIO. I have 12 bit data from an ADC (AFE5807) coming in at 80MSPS. I wanted to use DDIO to receive the da...
Altera_Forum
Honored Contributor
13 years agoThe best way to see if this is possible or not is to create a simple, mock-up, design and run it through TimeQuest.
But the maximum possible clock frequency is usually listed in the "DC and switching characteristics" part of the device's Handbook. The slower grades of Stratix III might not do what you need. You should also read the DDR Timing cookbook: http://www.alterawiki.com/wiki/ddr_timing_with_timequest