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Altera_Forum
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14 years ago

DC offset removal using FPGA?

I am new to interface FPGAs with DSP concepts. I have ADCs and then i have deserializers after them to parallelize the data. So should i apply the DC removal after the deserializer or before it? ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Hi DWH,

Maybe you can make me clear whether the AC couple of the differential ADC just eliminate the DC (or noise) of the signal source, but there also is intrinsic DC of the ADC devices?