Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

DC offset removal using FPGA?

I am new to interface FPGAs with DSP concepts. I have ADCs and then i have deserializers after them to parallelize the data. So should i apply the DC removal after the deserializer or before it? ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I understand the method provided by Kaz, i think. But i lag the connection of how do we implement this DC filter using FPGAs, as this would would be my first attempt to try some DSP usinf FPGAs.

I have data from a transducer and it is being passed through ADc and then deserialized.

I will check for the DC and AC coupling.

But if i am right, i need to simulate this model using matlab to atleast figure out the basics of how moving average filter works.

Thankx