Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorDC offset removal using FPGA?
I am new to interface FPGAs with DSP concepts. I have ADCs and then i have deserializers after them to parallelize the data. So should i apply the DC removal after the deserializer or before it? ...
Altera_ForumHonored Contributor
Honored ContributorSee my post at:
http://www.alteraforum.com/forum/showthread.php?t=29991&highlight=dc+filtering&page=2 you filter your data when parallelised into readable samples.
