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Altera_Forum
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13 years ago

DAC (DAC5672) and ADC (AD9254) in VHDL

Hi, i have a project in which i need to create the VHDL code for a DAC (DAC5672) and an ADC (AD9254). It is part of a CDMA. The DAC must incorporate a 2's complement and the ADC must incorp...
Altera_Forum's avatar
Altera_Forum
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13 years ago

Would this do ?

process(clk)

begin

if(clk'event and clk ='1') then

analog_out <= not(digi_in) + "00000000000001"; -- complément à 2

end if;

end process;

I don't think this is right because i'm not sure i can directly send the in to the out of the DAC, i think i have to go through a signal (which is why i did the code like that in the first place) but like this analog_out is only assigned once and is not overwritten i think ?