DAC (DAC5672) and ADC (AD9254) in VHDL

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ok, so for the ADC, would this work ?

if(clk'event and clk ='1') then

adc_out(12 downto 0) <= analog_in(12 downto 0);

adc_out(13) <= not analog_in(13);

end if;

Now the MSB and the rest of the word are synchronised right ?

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Yes, now synchronised

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And for the DAC, would it be better to replace analog_signal directly with analog_out ?

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Note quite. You'll still have the same problem. Ill let you think about it....

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Although i don't see how this will convert a digital signal to an analogue signal...

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It wont, unless this is the number format that your external DAC chip requires.