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Altera_Forum
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12 years ago

CycloneIII Vs CycloneIV :: Urgent Help Required

Hello,

I am using below devices for my two seperate projects having same RTL and exactly similar Synthesis/PAR settings.

Project 1:

set_option -technology CYCLONEIII

set_option -part EP3C120

set_option -package FC484

Project 2:

set_option -technology CYCLONEIV-E

set_option -part EP4CE115

set_option -package FI23

set_option -speed_grade -7

From the performance summary and final PAR reports, I see that for few paths, CycloneIII is giving positive slack whereas CycloneIV is giving Negative slack.

My understanding is, higher device grades should always give a better performance compared to older devices.

On that note, can you help me understand which is a faster device between these two device series.

Regards,

freak

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    Which speed grade did you do for Cyclone III?

    Within a family, speed grades determine relative speed. Across families, it's a pretty good marker but by no means exact. Some things may speed up while others slow down, and so you have to test your design to be sure.
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    Hi Rysc,

    Please find the CycloneIII device details below;

    Can you please help me understand why this change. Is there any problem with my understanding here ?

    set_option -technology CYCLONEIII

    set_option -part EP3C120

    set_option -package FC484

    set_option -speed_grade -6
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    Oh, by higher device grades, you mean speed grades. I was thinking you meant "higher architecture/process", i.e. Cyclone IV should be faster than Cyclone III. My mistake. Altera speed grades go in the opposite direction of Xilinx's, so slower is faster. So the high end Stratix V devices are -1,-2,-3,-4(and something will have to be figured for Generation 10, which will be even faster...). So the fact that a CIV -7 is slower than a CIII -6 is how it's supposed to work. (But again, it's not guaranteed across families).

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    If I am not mistaken, the larger the speed grade value, the slower it is. (i.e, a device with speed grade 6 is actually faster than a device with grade 7)

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    Hi,

    I understand this but i always tought this is applicable for same device series.

    Across device series, my impression was higher device will always be faster than previous devices irrespective of speed grades.

    i.e. Cyclone IV (any device) is faster than any speed grades of CycloneIII.

    From all your reply, i think this statement is wrong.

    Can you please help confirm on above point ?

    Many thanks.

    Regards,

    freak
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    speed wise, the new generation chips maybe better. But when you put your design into dedicated FPGA it is more complicated.

    1) the highest speed of last generation FPGA maybe faster than the current generation low speed FPGA. especially when the upgrade of the FPGA is mainly for marketing purpose rather than technology.

    2) even the FPGA is faster, it is not equal to say that the program can be fitted into it. It depends on the pin location definition and program optimization for the dedicated FPGA. the faster FPGA can give you overall more headroom for your application, but you still need to put your effort to make it work.

    3) The FPGA with more resources, such as more memory, LEs, PLLs, pins, etc. is not always good for speed. Sometimes it needs longer path for the logic from pin to pin. Again, if the old FPGA satisfies your need it is not necessary to upgrade it since each FPGA has a very long life time.