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Altera_Forum
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9 years ago

Cyclone V, HPS SPI routing to FPGA pins

Hello everyone, I'm using the DE0-Nano Soc Board and tried to route the signals of the HPS SPI Master Peripheral to FPGA Pins. In Qsys i activated the SPI Master and set the pins to FPGA. In ...
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Altera_Forum
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9 years ago

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Hello Captain-Chaos,

I'm facing the same problem while exporting the spi_clk hps signal to fpga and got this error. Did you managed to solve it? I used the workaround posted but the error is still there.

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Hey,

in my Design the solution with an boolean combinational function works fine. Did you try this or the maual LUT instantiation?

AN706 (https://www.altera.com/documentation/mwh1410561892049.html) describes the reqired steps to export the perihperals, have you checked that there is no fault in your design?