Forum Discussion

New Contributor

7 years ago

Cyclone V f2sdram bridge clock rate

I could not find it in the datasheet - is it possible at all to drive f2sdram bridge in Cyclone V devices at a clock rate more than 100MHz?

Regular Contributor

7 years ago

Hi,

It is possible, but at higher clock rates, a PLL is necessary to ensure that the SDRAM clock toggles only when signals are stable on the pins.

More info could be found here:

Regards.