Cyclone V E Development Kit failed on Active Serial Configuration via JTAG

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Hi Guys,

I don't know if the problem was solved.

I had the same one and I solved it.

The MAX V controller doesn't allow to write the EPCQ with the jtag connector.

First you should set the switches to tell you are using the AS.

Second you should rework the resistors R16 to R18 and R22 to R23.

Then you should reprogram the MAX V to inhibit the PFL but only the outputs to the FPGA config inputs. You can use the source code provides with the kit.

It' is a shame that Altera doesn't explain this in the documentation and hasn't developed a pof to correct the problem.

Now I cant write a jic to the EPCQ.

And it works.

I'haven't gone deeper yet but these actions inhibit the embeded blaster II. I think it should be a clock problem, but for my personal use the embeded blaster II is useless.

I will post a solution if i have enought time.

Regards every body.

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Yeap, the resistors rework should work as I told earlier if look at the datasheet connection, just that I do not have the board, but it shouldn't be an issue.