Cyclone V E Development Kit failed on Active Serial Configuration via JTAG

Hi John,

Please refer to the following manual for the Cyclone V E Dev Kit :

https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/manual/rm_cve_fpga_dev_board.pdf

The following is taken from the Cyclone V E kit manual:

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By default, this board has a FPP configuration scheme setting. In order to set the configuration scheme to AS mode, resistor rework needs to be done.

Configure the MSEL setting using the MSEL DIP switch (SW1) to change the configuration scheme.

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https://www.alteraforum.com/forum/attachment.php?attachmentid=14427

What this means is that, to use EPCQ device , you may have to rework the board with 10K resistors as shown in the figure. Before proceeding , please check your board if this configuration is already present. If so, then you just need to modify the SW settings and try. If not, then you need to get 10K resistors and wire the respective signals as shown in the schematic, change the SW settings and then try.

-Abr