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Altera_Forum's avatar
Altera_Forum
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8 years ago

Cyclone V DDR3 package deskew

Dear folks, I'm currently designing a Cyclone V DDR3 Ram interface with a single component DDR3L using the hard memory controller. In EMIF handbook I find, that for clock < 933MHz no package de...
EEnam's avatar
EEnam
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7 years ago

Hi, I was wondering about lines length in the SODIMM flat mounted PCB connector. I think lines of this connector is different in length between sides, am i wrong? Do I need to deskew this difference on PCB traces too?