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Altera_Forum
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13 years agoCyclone IV E JTAG issues - VCCA voltage level
Hi all, I have a custom board with Cyclone IV E (EP4CE115-F484). I am trying to access it via JTAG from Quartus, but keep receiving the "Error: Can't access JTAG chain". I check the Quar...
Altera_Forum
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13 years ago --- Quote Start --- Hi there, I assume U23 is some level shifter - I'm not quite sure if this may not cause timing issues when configuration is to be loaded from the EPCS4 as this defintely adds twice to the timing on DCLK and Data.. Some things to mention: The configuration scheme (0010) is for active serial, 3.3V(!). As you wrote 1.8 => 2.5V, the EPCS is powered by 2.5V, this requires MSEL configuration as (0011)... The DCLK being some quite strange signal (more a sawtooth rather an rectangular signal) - is this due to the scope's limitation (bandwidth)? I have to check the rise time on my board for nStatus, but even this signal seems for me to be not really "quick" enough at High level.. Nevermind - if the DCLK is operated by the Cyclone, this indicates the FPGA is out of internal reset and as there are just two "blocks" I would assume there must be some problem with the configuration data (is there any pof stored in the EPCS). Seems like the configuration cycle ends as the internal configuration controller does either not receive any data (put the scope on Data0) or the received data indicate not being for this EP4CE115... I'll try to record these signals on my board meanwhile... --- Quote End --- Yes, it is a level converter. The one side connects to FPGA @ 2V5 and the other to EPCS @ 3V3, so it should be ok. BUT, I am not there yet. The EPCS is still blank and I have disabled the level converter. I have found out that the status line is going high and at about 1V2 the device is officially out of reset. Thus DCLK start to see if it can configure, but since EPCS is blank, it fails and then later tries again. This is all good news since it means the device is happy with the power rails. So now I am back to the JTAG port. 1. Power is ok and POR can complete 2. TCK to device is looking good at 2V5 (very little overshoot) 3. TMS to device is looking good at 2V5 4. TDI to device is also looking good 5. tdo responds to all of this but the level is sub 1v
Added a pullup to the TDO, still same voltage Disconnected pull up and wire from Blaster, voltage out of TDO still just 1V. Quartus jtag debugger says the TDO is stuck to ground, which makes sense since the 1V signal is looking like a low to the blaster.