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Altera_Forum
Honored Contributor
13 years agoCyclone IV E JTAG issues - VCCA voltage level
Hi all, I have a custom board with Cyclone IV E (EP4CE115-F484). I am trying to access it via JTAG from Quartus, but keep receiving the "Error: Can't access JTAG chain". I check the Quar...
Altera_Forum
Honored Contributor
13 years agoHi there,
I assume U23 is some level shifter - I'm not quite sure if this may not cause timing issues when configuration is to be loaded from the EPCS4 as this defintely adds twice to the timing on DCLK and Data.. Some things to mention: The configuration scheme (0010) is for active serial, 3.3V(!). As you wrote 1.8 => 2.5V, the EPCS is powered by 2.5V, this requires MSEL configuration as (0011)... The DCLK being some quite strange signal (more a sawtooth rather an rectangular signal) - is this due to the scope's limitation (bandwidth)? I have to check the rise time on my board for nStatus, but even this signal seems for me to be not really "quick" enough at High level.. Nevermind - if the DCLK is operated by the Cyclone, this indicates the FPGA is out of internal reset and as there are just two "blocks" I would assume there must be some problem with the configuration data (is there any pof stored in the EPCS). Seems like the configuration cycle ends as the internal configuration controller does either not receive any data (put the scope on Data0) or the received data indicate not being for this EP4CE115... I'll try to record these signals on my board meanwhile...