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Altera_Forum
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15 years ago

Cyclone III with 5v inputs

I'm trying to connect approximately (16) 5v TTL inputs into a Cyclone III eval board, the terasic de0 [1]. These are all input towards the FPGA only. The eval board has (2) 40-pin IDC headers for t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

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if I use pull-downs on the buffer inputs like you mention here (http://www.alteraforum.com/forum/showpost.php?p=123853&postcount=8)

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There is a big difference between using a buffer and a bus-switch.

A bus-switch can be used for bi-directional clamping of signals.

The bi-directional nature of this solution means that you can use the pull-ups on the FPGA I/O pins to guarantee that the I/O pins are at a valid logic level at all times.

No need for pull-ups on your bus switch board.

Cheers,

Dave