Cyclone III Reset in User mode

We are using a 780-pin Cyclone III LS, and occasionally we are seeing the FPGA reset itself while running in user mode while doing temperature related testing.

The resets aren't particularly consistent, usually around -20C or +30C.

We are watching the nCONFIG and nSTATUS lines with a logic analyzer. Both have pull-ups on them, and we've seen them pulse low when this reset happens (nCONFIG for about 40ns, nSTATUS for about 40us)

nCE is grounded, but we don't have easy access to it to check it.

We've attached lines to our 3.3V, 2.5V and 1.2V lines to monitor them with an oscilloscope, and we are waiting for the reset to happen again to check the voltage levels when it does occur.

MSEL0, 2 and 3 are grounded; MSEL1 is set high. We're using JTAG for initial programming and Active Serial afterwards.

Are there any other lines I should be monitoring or places I should look? I can't think of anything else off hand that could be causing this reset/reconfigure to happen, so any suggestions would be most appreciated.

Thanks!