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We are designing a board that would benefit from this function a lot so we can deliver a low end and a high end design using the same PCB with alternative FPGA (choosing between F256, F484 and/or F672).
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Cyclone family FPGAs have the dedicated clock inputs at the two outermost BGA rows, so a migration across different package sizes is effectively impossible considering this detail.
But you have vertical migration within the same package, which should basically fulfill your intention. Most of the FPGA price is paid for the chip size, the differences between small and large packages are moderate.
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