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They didnt mention that all of VCCIO should be connected
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See POR chapter in Cyclone III hardware manual. In your design, both bank 6 and 7 are driven from 1V8 volt.
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Cyclone III device family contains POR circuitry to keep the device in a reset state
until the power supply voltage levels have stabilized during power up. During POR,
all user I/O pins are tristated until the VCC reaches the recommended operating levels.
In addition, the POR circuitry also ensures the VCCIO level of I/O banks 1, 6, 7, and 8
that contains configuration pins reach an acceptable level before configuration is
triggered.
The POR circuit of the Cyclone III device monitors the VCCINT, VCCIO, and VCCA pins
during power-on. The enhanced POR circuit of the Cyclone III LS device includes
monitoring VCCBAT to ensure that VCCBAT is always at the minimum requirement voltage
level.
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