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Altera_Forum's avatar
Altera_Forum
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18 years ago

Cyclone II programming problems

Hi all -- I've built a few PCBs based on Cyclone II FPGAs. Some of these boards, and especially the last, suffer from an annoying problem: When connecting the FPGA to the JTAG cable, Quart...
Altera_Forum's avatar
Altera_Forum
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18 years ago

You might double check all your pin connections (i.e. VCC, GND, clocks, etc). Also, the QII software will configure unused I/O as "Output Driving Ground" which can be a big problem if one of these pins happens to be tied to VCC. You might try changing the unused I/O to "as input tri-stated" and see if this makes any difference.

set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"

Is the part hot to the touch before "powering down" (unless it is programmed as such, there is no power down / sleep mode that I'm aware of).

Considering the programmer is telling you the device is configured successfully, I think it's time to look at the pin connections and/or the design(?)