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Altera_Forum
Honored Contributor
Honored ContributorCyclone 4 deserialization, banks, pll
Dear Gurus; I have 1 Cyclone IV GX EP4CGX150(DF27C7) This Cyclone IV is connected to 6 x Cyclone III (C40F484) All of these 6 Cyclone IIIs will send 4 bit LVDS serialized input data ...
Altera_ForumHonored Contributor
Honored ContributorThe standard method is to transmit the slow clock from the source and generate the fast clock at the receiver side. However, if you transmit both, you don't necessarily need a PLL. But the fast clock should be alligned suitable for deserilization.
