Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Cyclone 3 on-chip series termination (OCT)

Hi, I am drawing schematics for a new system that uses a Cyclone 3 FPGA. I have some LVTTL (3V3) signals on which I would like to use a 50R series termination. The Cyclone 3 has two possible ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

--- Quote Start ---

The handbook doesn't specify the standards that can be used with the calibrated termination.

--- Quote End ---

The standards for calibrated OCT are actually listed in table 7-3, the title has a typo. The 3.3V IO-standards don't support OCT due to restricted current strength allowance. The default 3.3-V LVTTL IO setting with current strength of 8 mA (see table 7-1) is near to the uncalibrated 50 ohm OCT setting that is used as default for other IO standards.