Counters

Scenario# 1 is "asking" for three adders. The synthesis tools will most likely recognize that they are the same and merge them. Scenario# 2 is "asking" for one adder and a multiplexer driving cnt_tmp. The multiplexer will be (probably 32 bits) wide at first, then collapse rapidly due to all of the constant inputs. # 2 is better than# 1 because it more closely resembles the best hardware implementation. There is less chance for something to go wrong.

An even better implemenation is to build a standalone counter, with 1 bit increment and decrement control signals. Use the state machine to drive these control lines. This gives the tools absolutely no chance to make a mistake.