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Altera_Forum
Honored Contributor
18 years agoCounter and time delay
Hi, I'm very new in Quartus, I just started a couple of days ago. The situation is that I've 4 inputs (only one of these can be active at time) and every time input changes to another, I n...
Altera_Forum
Honored Contributor
18 years agoOkey, I have been studying Verilog and I managed to write what I wanted but I still can't build a timer. I've tried e.g.
always @ (posedge pulse_in) begin pulse_out = 1; repeat (5) begin @ (posedge clk) ; end pulse_out = 0; [/INDENT] end but Quartus doesn't allow this (multiple event control statements not supported for synthesis). So what would be a solution?