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Altera_Forum
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15 years ago

Correct Arria II GX ALTGX Reset Sequence?

I have designed a reset controller for my ALTGX-based PIPE interface per The Arria II GX handbook, Vol2 page 4-16. My goal is to be able to capture the PCIe compliance pattern sent out by a PC mother...
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Altera_Forum
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15 years ago

NOTE: When connecting the FPGA inputs directly to the motherboard slot (via a converter board) I still get pipestatus 4 (8b/10b decoding error). Since this is directly connecting the Arria II GX to the motherboard without any buffers inbetween it must mean something is not working correctly with the FPGA configuration.

Note that the transmit pins are not connected, only the receive pins.