Altera_ForumHonored Contributor13 years agoconver froms td_logic_vector to integer hai every one i'm new to vhdl code and i got problem how to use decimal value instead of binary for example right_m<="1010001010"; left_m <="1011101110"; i want to conver...Show More
Recent DiscussionsEMIF Pin Assignment for Agilex 7 FPGA I-Series DevKit (DK-DEV-AGI027R1BES)Vcm for the clock input pins of agilex5 E-series FPGA A5ED065BB32AE5SR0Timing Slacks inside Altera IPPart Status requestAgilex 7 DDR4 Reset and ADDR/CMD Clock PCB Implementation Documentation Discrepancy