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Altera_Forum
Honored Contributor
13 years agoconver froms td_logic_vector to integer
hai every one i'm new to vhdl code and i got problem how to use decimal value instead of binary for example right_m<="1010001010"; left_m <="1011101110"; i want to conver...
Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- you can also try: right_m<=conv_std_logic_vector(650,10); left_m <=conv_std_logic_vector(750,10); --- Quote End --- But this is considered bad practise, as it requires the library ieee.std_logic_unsigned. This library should really be avoided, as it can cause confusion and problems when trying to use a bit more arithmetic.