Forum Discussion
Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- you can also try: right_m<=conv_std_logic_vector(650,10); left_m <=conv_std_logic_vector(750,10); --- Quote End --- But this is considered bad practise, as it requires the library ieee.std_logic_unsigned. This library should really be avoided, as it can cause confusion and problems when trying to use a bit more arithmetic.