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Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- you can also try: right_m<=conv_std_logic_vector(650,10); left_m <=conv_std_logic_vector(750,10); --- Quote End --- If you use the vhdl 2008 compiler option in Quartus, then you can use the constructs: right_m <= 10D"650"; left_m <= 10D"750"; In addition, you will want to use ieee.numeric_std.all as the previous post suggested. Best, James