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Honored Contributor
Honored ContributorConstraining PLL output clocks
Hello, I was wondering how I am supposed to go about constraining the output clock(s) of a PLL. I have tried using the generated clock command but using this my design fails timing analysis. I...
Altera_ForumHonored Contributor
Honored ContributorSo does derive_pll_clocks take care of both the input and output of the pll? Must I do anything additional to relate the source clock to the pll? Thanks for the reply.
