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Altera_Forum
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15 years ago

Constants in Verilog

Hi, I have a IP coded in verilog. The simulator used in Modelsim and Synthesizer is Quartus II. This IP is going to Stratix FPGA with other IP's. I am confused about the usage of 'define and ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

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He was quite opinionated, but backed it up nicely with his explainations and examples.

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Cliff Cummings is allowed to be opinionated because he is absolutely brilliant when it comes to HDL coding styles and practices. Almost every single paper he has written has won first/second place at various national HDL conferences. You should read _all_ of his papers - they will make you a much better HDL programmer - I keep all his papers on my bookshelf and reference them as I would HDL text books.