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Altera_Forum
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14 years ago

configuring multiple fpga's with multiple bitstreams via JTAG connection.

Hello People, I have successfully developped a special board with six fpga's (EP3C25) each fpga has its own EPCS16 configuration memory and they are programmed seperately on their own JTAG sock...
Altera_Forum's avatar
Altera_Forum
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14 years ago

If you intend to use serial flash, either Altera EPCS or compatible industry standard types, AS configuration scheme would be the most simple option. It could also use the Remote System Upgrade IP to select between configurations and won't necessarily need a µP for configuration control.

PS is often used with parallel flash and serial data stream generated in the configuration controller, either MAX II (with PFL IP) or a µP.

Buffers will be needed depending on the number of FPGAs and intended DCLK speed. Also the trace length plays a role. Standard 3.3V logic families, e.g. LVC can work.