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Honored Contributor
Honored ContributorConfigure MAX10 CPLD using remote micro CPU
I would configure MAX10 CPLD using remote micro CPU. As I got from the datasheet MAX10 has only JTAG setup, I mean first time MAX10 initialization. I tried to look through the many d...
Altera_ForumHonored Contributor
Honored ContributorUsing Altera JRunner you can configure an FPGA via a micro, etc.
For MAX10 & Arria10 devices Altera supplied Jam STAPL software. The source codes are available, so you can edit them and include them in your Microcontroller code. They accept .rbf file and the .rbf format could be generated by Altera Quartus. Have a look at these pages: https://www.altera.com/support/support-resources/download/legacy/jrunner.html (https://www.altera.com/support/support-resources/download/legacy/jrunner.html) https://www.altera.com/support/support-resources/download/programming/jam.html (https://www.altera.com/support/support-resources/download/programming/jam.html) https://www.altera.com/en_us/pdfs/literature/an/an414.pdf (https://www.altera.com/en_us/pdfs/literature/an/an414.pdf) http://www.alterawiki.com/wiki/nios_jrunner_example (http://www.alterawiki.com/wiki/nios_jrunner_example)
