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Honored Contributor
Honored Contributorconfig fpgas with other fpga in AS mode
When I config FPGAs with other FPGA in AS mode,I met troubles below. When I select 3.3v LVTTL as IO STANDARD,the phenomenon is as below. FPGA-1 : the DCLK pin's voltage is about 3.3v FPGA-2 : ...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- These settings can't explain the findings in post# 1 if everything is in regular operation. There must be a kind of hardware error, e.g. other signals shorted to the said DCLK signal that doesn't achieve the full level. --- Quote End --- If as you said,I think the DCLK signal also cann't achieve the full level when 2.5v IO Standard.Can the DCLK signal?
