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Altera_Forum
Honored Contributor
Honored ContributorComplete FPGA Check
I am using a Cyclone III. Is there a possibility or has someone created a design to test that this whole thing is working correctly. In detail to test all the LE connections and so on... I know it mu...
Altera_ForumHonored Contributor
Honored ContributorIsn't there a way to load the FPGA step by step with a growing design to find out if it is a malfaunction of IOs oder internals? I once had the case that all worked - including IO behaviour - but when adding design parts which forced the fitter to aquire some more block RAM than before, the chip failed. Replacing the CHIP was the solution.
BTW: These problems lead me to demand allways more than only one board for testing, when loading designs into systems, which both are still under development :-)
