compiling package

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When I tried to compile package in quartus i get " Error (12007): Top-level design entity "usb_pkg" is undefined"

what are the compiler settings I need to use?

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this is VHDL code I down loaded. I am using Quartus software from Altera. I was able to compile files that had entity declarations. all the "components" are put in a package so I can implement a USB device in the FPGA. For package file there is no entity. Obviously i am not setting up the compiler correctly. It worked for others by declaring the entity name in the genaral part of the settings to compile. with the package file, I am getting this error. (sorry for the confusion about package). I looked through the VHDL book and the file is correct but I am doing something wrong to compile;. appreciate help