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Altera_Forum
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15 years ago

Clock division and multiplexing in Cyclone-I

Hello all, I have Cyclone-I FPGA in my lab. It is: EP1C12Q240C6. My requirement is to be able to select between 2 different crystal clocks, and their divide-by-2, divide-by-4 and divide-by...
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Altera_Forum
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15 years ago

Hi Kaz,

Thank you very much for the response. Actually, I need to drive the generated data along with the selected clock out of the chip. So I can't use clock enables, because I need an actual running clock for driving out. Can you kindly suggest some other way around.

regards,

rajesh