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Honored Contributor
Honored ContributorCLK Pins Positive or Negative Edge
Hello People, I have 3 questions about CLK input pins. 1- I see that there are 16 CLK pins on the EP3C25E144 fpga. On the Pin Planner, i see that some of them are positive edge, some ...
Altera_ForumHonored Contributor
Honored ContributorConnecting CLK source to multiple inputs has been necessary up to Cyclone II family, if you wanted to drive more than one PLL. Starting with Cyclone III, the clock can be routed internally. Jitter or clock skew requirements can still suggest to connect multiple inputs in some cases.
