CIII / Configuration

I posted about the freeze phenomenon when I found out about it. I wouldn't lead you guys along and not paint a full picture.

I am more and more leaning towards a fabrication/assembly issue. I have engaged Altera through my local FAE as this is a big issue for my company right now. Altera has assured me that if one adheres to their layout rules (traces less than 6" and matched) that the timing is all baked in and owned by them. I meet both of those criteria. There really isn't much else to look at beyond some type of assembly issue, I believe.

The only JTAG tool I have is the programmer attached with Quartus--is this something Quartus can do? I could probably get my hands on one, though.

I am having one of the boards that doesn't work x-rayed (3D) tomorrow. Maybe that will show something.

I do appreciate your time and insight.

I do understand what you're saying about timing; but if your receiver doesn't have a tHOLD time of 0 then you could get into trouble. Some of the AFE's that I've worked with operate using the falling edge/rising edge approach. In these cases, I've been forced to write data out on one edge and read it in on the other.

I will inform the forum on the end of this saga.

Take care,

Rob