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Honored Contributor
Honored Contributorchange the clock frequency of the FPGA board
I want to change the clock frequency of FPGA DE0 board from 50MHZ to 8MHZ, As my IP core generally worked at 8MHZ. How can I realize this? Use PLL? If I use PLL, the input is the 50MHZ, how can I con...
Altera_ForumHonored Contributor
Honored ContributorAnd when I use PLL, the input name of clock is osc_clk, but in the pin assignment the name of clock is still the CPU's clk, it doesnot change,I donot why. It seems the pll doesn't work. Do you know where is wrong?
