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Altera_Forum
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14 years ago

Cascading CPLDs on different PCBs

I'm designing a basic harness continuity checker based on shift registers implemented in Max V CPLDs. I'm aiming for a modular/extendable PCB design for the project as it has several benefits (cost, ...
Altera_Forum's avatar
Altera_Forum
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14 years ago

Thanks, Dave. Going through your documents now.

I agree with your philosophy 100%. Which is why, after some discussion with my colleagues, is there any inherent advantage to this "Parallel-SPI" approach over doing it like JTAG? We can still program the CPLD on the main board with advanced things later on (like checksum, etc.) This approach would eliminate the addressing, wouldn't it? We can just use two CS to select between the CPLDs intended for driving and those intended for receiving. Here's what I mean:

When I want to drive the test-vector into the driving CPLDs, I select CS1. If I want to receive the output vector, I select CS2. Essentially, I treat a chain of CPLDs as a single shift register. No need to mess with addressing (I think?)

http://i.imgur.com/XjQk1.png

Will this work?